x86info-1.31+git.20200121-2.6 RPM for x86_64

From OpenSuSE Tumbleweed for x86_64

Unlike other 'cpuinfo' tools which just parse /proc/cpuinfo, x86info
probes the CPU registers to find out more information. It can discover
the contents of model-specific registers, discover CPU silicon
revisions, and more.

Provides

• x86info
• x86info(x86-64)

Requires

• libc.so.6()(64bit)
• libc.so.6(GLIBC_2.11)(64bit)
• libc.so.6(GLIBC_2.2.5)(64bit)
• libc.so.6(GLIBC_2.3)(64bit)
• libc.so.6(GLIBC_2.3.4)(64bit)
• libc.so.6(GLIBC_2.34)(64bit)
• libc.so.6(GLIBC_2.4)(64bit)
• libpci.so.3()(64bit)
• libpci.so.3(LIBPCI_3.0)(64bit)
• libpci.so.3(LIBPCI_3.5)(64bit)
• libpci.so.3(LIBPCI_3.8)(64bit)
• rpmlib(CompressedFileNames) <= 3.0.4-1
• rpmlib(FileDigests) <= 4.6.0-1
• rpmlib(PayloadFilesHavePrefix) <= 4.0-1
• rpmlib(PayloadIsZstd) <= 5.4.18-1

License

GPL-2.0-only

Changelog

* Wed Oct 26 2022 Steve Kowalik <steven.kowalik@suse.com>
  - Add patch use-python3.patch:
    * Use python3 to create header files.
* Tue Jan 21 2020 Josef Möllers <josef.moellers@suse.com>
  - Upgraded to new version 1.31+git.20200121
    * update intel codenames/models
    * gcc-8 fix
    * No more periodic versioned releases.
    [x86info-1.31+git.20200121.tar.xz]
* Wed Nov 07 2018 Jan Engelhardt <jengelh@inai.de>
  - Use noun phrase in summary.
* Thu Oct 11 2018 Martin Pluskal <mpluskal@suse.com>
  - Update to version 1.30+git.20180323:
    * rename release target to tarball
    * bump minimum for -Werror to gcc 6.3
    * add tag target
    * Make cpuid-freebsd.c:cpuid() handle top word of idx as count (%ecx), same as cpuid-linux.c:cpuid() does.
    * Make native_cpuid() handle top word of idx as count (%ecx), same as cpuid-linux.c:cpuid() does.
    * Fix vendor/inte/identify-family6-extended.c::get_namestring() to print cpu mode name correcty. When I tested on Kaby Lake machine, it shows:
    * amd: Identify Family 17h model CPUs
    * Makefile: Use pkg-config libpci location
  - Use more accurate versioning
  - Update build requirements
  - Make building more verbose
* Tue Jul 18 2017 fschnizlein@suse.com
  - Update to HEAD (9501749231164135db25c72cbeb42bf32af1519b)
    * Make it possible to statically link with libpci.
    * Add another Nehalem variant
    * Add exact steppings and complete list of all bloomfield cores.
    * add Knights Mill Xeon Phi.
    * - Add PREFETCHW instruction flag.
    - Add Hardware Duty Cycling flag.
    - Add HW-controlled performance states (HWP) flags.
    * Add 0x64, 0xa0, 0xc3 and 0xc4 into DTLB_cache_table[].
    * - Add Atom E3500.
    - Add Atom X3-C3000 [Silvermont].
    * Add NetBSD support. Note that NetBSD has not API to access MSR register from userland.
    * handle null EBDA pointer.
    * handle failure from enumerate_cpus
* Wed Sep 09 2015 mpluskal@suse.com
  - Update to 1.30
    * no upstream changelog available
  - Cleanup spec file with spec-clener
* Tue Oct 14 2014 jengelh@inai.de
  - Use parallel build and remove ancient specfile tags and sections
* Fri Aug 26 2011 trenn@suse.de
  - Update to latest git version
    - > 1.29 plus some more patches until
      git commit aa57556f60c89eb84f65cb55e0215ff9be97dbec
    Includes:
    - Show boost state info on AMD
    - Identify some more cpus
    - ...
* Wed Mar 16 2011 trenn@novell.com
  - Update to version 1.28
    Changelog (extracted git commit subjects, shortened):
      Some more IDA decoding
      Start decoding IDA
      gather topology info per-cpu
      Split intel info into basic/extended.
      only display extended family/model if set
      print out the BIOS programmed string by default too.
      Also clarify which is x86info's guess.
      put back some of the mptable verbose/silent code.
      rename bluesmoke to machine_check
      Split MSR-PM into thermal and performance
      IA32_PERF_STATUS is model specific.
      Dump APIC registers
      Add and show info about virtual and physical address sizes
      Decode MTRRphysBase and MTRRphysMask
      use MB macro, like in the kernel
      update cache descriptors
      Decode MTRRcap and MTRRdefType registers
      Make makenodes script more robust
      Add an Atom variant
      Add an Intel codename.
      Add an atom ident.
      Add some Nehalem core codenames.
      Add Core i7 informational URL.
      Report whether longnops are supported
* Sun Feb 13 2011 trenn@suse.de
  - Update to version 1.27
    Changelog (extracted git commit subjects from 1.25-1.27):
      only support topology parsing on intel for now
      Factor out the topology printing code into its own routine
      add more Intel CPUID flags
      Add informational URL for Pentium III Dothan.
      fix invalid usage of printf
      cpuid.c: Use native cpuid call silently instead of failing
      Remove the message about cpuid_up being inaccurate.
      Makefile: Override dependency output file with -MF
      Add additional Intel CPUID flags
      x86info: show microcode patch level for AMD CPUs
      x86info: identify newer AMD CPUs (e.g. Istanbul, Phenom II)
      Don't specify any ld flags until the linking occurred.
      Display register info when flag is unknown.
      Additional flags and a little cleanup
      Enhance descriptions for Intel feature flags.
      ecx flags update patch
      move get_cpu_info_basics() prior to get_feature_flags()
      Full RELRO support. Because there's no reason not to.
      improve the ht siblings text
      Handle non-sequential socket numbers correctly.
      Only calculate MHz on the first cpu, unless --all-cpus is passed.
      remove extraneous space
      discrimination between HT and dual-core.
      Store the number of siblings.
      delete core dumps with make clean
      clean up the output for single cpu case.
      Fix segfault by sizing the sockets array correctly.
      correctly clear the sockets struct.
      Make the output even more fancy.
      print the MHz in the summary. Also change the summary text a little.
      Clean up exit codes
      Print out a summary footer.
      Introduce a --debug switch, and hide some stuff behind it.
      Print a summary of the information from topology discovery.
      Make the new cpuid4 & cpuid_count functions take a cpu number
      integer instead of a cpudata struct so they match the other cpuid
      functions.
      Intel CPU topology reworking.
      PATCH: add support for new cpuid descriptors
      fix up release to use new git syntax

Files

/usr/bin/x86info
/usr/sbin/lsmsr
/usr/share/doc/packages/x86info
/usr/share/doc/packages/x86info/README
/usr/share/doc/packages/x86info/TODO
/usr/share/licenses/x86info
/usr/share/licenses/x86info/COPYING
/usr/share/man/man1/x86info.1.gz
/usr/share/man/man8/lsmsr.8.gz

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Fabrice Bellet, Tue Apr 30 23:32:46 2024