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| Name: verilator | Distribution: Fedora Project |
| Version: 5.014 | Vendor: Fedora Project |
| Release: 3.fc40 | Build date: Sat Jan 27 08:46:34 2024 |
| Group: Unspecified | Build host: buildvm-a64-27.iad2.fedoraproject.org |
| Size: 123049799 | Source RPM: verilator-5.014-3.fc40.src.rpm |
| Packager: Fedora Project | |
| Url: https://veripool.org/verilator/ | |
| Summary: A fast simulator for synthesizable Verilog | |
Verilator is the fastest free Verilog HDL simulator. It compiles synthesizable Verilog, plus some PSL, SystemVerilog and Synthesis assertions into C++ or SystemC code. It is designed for large projects where fast simulation performance is of primary concern, and is especially well suited to create executable models of CPUs for embedded software design teams.
LGPLv3 or Artistic 2.0
* Sat Jan 27 2024 Fedora Release Engineering <releng@fedoraproject.org> - 5.014-3 - Rebuilt for https://fedoraproject.org/wiki/Fedora_40_Mass_Rebuild * Sat Sep 09 2023 Filipe Rosset <rosset.filipe@gmail.com> - 5.014-2 - fix build requires * Sat Sep 09 2023 Filipe Rosset <rosset.filipe@gmail.com> - 5.014-1 - update to verilator-5.014 * Sat Jul 22 2023 Fedora Release Engineering <releng@fedoraproject.org> - 4.226-3 - Rebuilt for https://fedoraproject.org/wiki/Fedora_39_Mass_Rebuild * Sat Jan 21 2023 Fedora Release Engineering <releng@fedoraproject.org> - 4.226-2 - Rebuilt for https://fedoraproject.org/wiki/Fedora_38_Mass_Rebuild * Sat Sep 24 2022 Filipe Rosset <rosset.filipe@gmail.com> - 4.226-1 - Update to 4.226, enabled tests, spec cleanup and modernization - Fixes rhbz#1933296 rhbz#2047099 and rhbz#2026957 * Sat Jul 23 2022 Fedora Release Engineering <releng@fedoraproject.org> - 4.108-5 - Rebuilt for https://fedoraproject.org/wiki/Fedora_37_Mass_Rebuild
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Fabrice Bellet, Sun Apr 21 01:28:21 2024