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perl-Verilog-CodeGen-0.9.4-1.el5 RPM for noarch

From Extras Testing Packages for Enterprise Linux 5 for ppc

Name: perl-Verilog-CodeGen Distribution: Extras Packages for Enterprise Linux
Version: 0.9.4 Vendor: Fedora Project <http://bugzilla.redhat.com/bugzilla>
Release: 1.el5 Build date: Wed Mar 25 00:06:47 2009
Group: Development/Libraries Build host: xenbuilder2.fedora.redhat.com
Size: 97002 Source RPM: perl-Verilog-CodeGen-0.9.4-1.el5.src.rpm
Packager: Fedora Project <http://bugzilla.redhat.com/bugzilla>
Url: http://search.cpan.org/dist/Verilog-CodeGen/
Summary: Verilog code generator
Provides an object-oriented environment to generate Verilog code for
modules and testbenches. The Verilog::CodeGen module provides two
functions, one to create a code template and another to create a Perl
module which contains the device library. This module ,
DeviceLibs::YourDesign, provides the class methods and contains the objects
for every Verilog module; the objects are created based on a fixed
template. The purpose of this module is to allow the generation of
customized Verilog modules. A Verilog module can have a large number of
parameters like input and output bus width, buffer depth, signal delay etc.
The code generator allows to create an object that will generate the
Verilog module code for arbitraty values of the parameters.

Provides

Requires

License

GPL+ or Artistic

Changelog

* Sun Dec 14 2008 Chitlesh GOORAH <chitlesh [AT] fedoraproject D0T org> 0.9.4-1
  - Specfile autogenerated by cpanspec 1.77.

Files

/usr/lib/perl5/vendor_perl/5.8.8/Verilog
/usr/lib/perl5/vendor_perl/5.8.8/Verilog/CodeGen
/usr/lib/perl5/vendor_perl/5.8.8/Verilog/CodeGen.pm
/usr/lib/perl5/vendor_perl/5.8.8/Verilog/CodeGen/Gui.pm
/usr/share/doc/perl-Verilog-CodeGen-0.9.4
/usr/share/doc/perl-Verilog-CodeGen-0.9.4/Changes
/usr/share/doc/perl-Verilog-CodeGen-0.9.4/README
/usr/share/doc/perl-Verilog-CodeGen-0.9.4/scripts
/usr/share/doc/perl-Verilog-CodeGen-0.9.4/scripts/GUI
/usr/share/doc/perl-Verilog-CodeGen-0.9.4/scripts/GUI/create_design.pl
/usr/share/doc/perl-Verilog-CodeGen-0.9.4/scripts/GUI/debug.pl
/usr/share/doc/perl-Verilog-CodeGen-0.9.4/scripts/GUI/inspect_code.pl
/usr/share/doc/perl-Verilog-CodeGen-0.9.4/scripts/GUI/rectangle_power_perl.gif
/usr/share/doc/perl-Verilog-CodeGen-0.9.4/scripts/GUI/send_stdout.pl
/usr/share/doc/perl-Verilog-CodeGen-0.9.4/scripts/GUI/test.pl
/usr/share/doc/perl-Verilog-CodeGen-0.9.4/scripts/GUI/update.pl
/usr/share/doc/perl-Verilog-CodeGen-0.9.4/scripts/gui.pl
/usr/share/doc/perl-Verilog-CodeGen-0.9.4/scripts/gui.pl.orig
/usr/share/man/man3/Verilog::CodeGen.3pm.gz
/usr/share/man/man3/Verilog::CodeGen::Gui.3pm.gz


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Fabrice Bellet, Tue Oct 21 05:11:48 2014